VHDL project

Completed Posted 6 years ago Paid on delivery
Completed Paid on delivery

Digital clock with Pmod OLED rgb display connected to FPGA Nexys4 DDR based on VHDL programming , including Digital clock package having the features of time sitting , alarm sitting ( on-off , a standard ringtone and flashing leds-2 LED CHASER- ) , stopwatch sitting

By default that display current date and time on two lines

Day dd/mm/yyyy : MON 17/02/2017

hh:mm:ss (AM/PM) : 11:23:55 AM

If i put the swich 1 that display : DATE SET ( nothing else displayed on the screen ) then i have 5 boutons lets say B1 B2 B3 to select day , month or year then B4 B5 to increment and decrement

Switch2 display TIME SET then by the same process B1 B2 B3 to select hour , minutes and seconds then B4 and B5 to increment and decrement

ALARM : Switch3 : on-off

Switch 4 display AlARM SET then B1 and B2 to select hours or minutes and B4 B5 to increment and decrement, in output i would love to have a standard rington BIP and 3 Led chaser ( chenillard by french )

stopwatch : switch 5 on-off , B1 play , B2 restart , B3 pause

I’m a beginner, that’s my first time ever , i will try to make a general architecture and then program it basing in VHDL so if u guess a bloc is so complicated u can suggest me a better way to do it or a better way to use switches ... or maybe something to add to my project by example 2 alarms ... thank you

I have a FPGA nexys4 DDR and Pmod OLED rgd

To connect Pmod OLED rgb i have some files ready to use i just have to declare the inputs’signals on the code ( there’s a place for that )

The link below contains the method i have the right to use To connect Pmod lcd with FPGA

[login to view URL]:pmodoledrgb

I need the also the state machine of the project and the general architecture of blocs ( register , counter , mux ... ) and an explanation of every bloc function ( 2 to 3 by example the bloc have for inputs the current signal and for output.. it count the value of .. that will be used for .. or it help to solve a problem which is .. )

Verilog / VHDL

Project ID: #15590136

About the project

7 proposals Remote project Active 6 years ago

Awarded to:

ahmedmohamed85

Dear sir I have more than 10 years experience in digital design using VHDL, also i already have the Nexys 4 board, please check my profile also please message me so that we can discuss Best regards Stay tuned, I'm st More

$222 USD in 3 days
(452 Reviews)
8.0

7 freelancers are bidding on average $164 for this job

loi09dt1

A proposal has not yet been provided

$50 USD in 5 days
(111 Reviews)
6.5
quandangvan

A proposal has not yet been provided

$200 USD in 7 days
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4.8
prakashddit

have 2.5+ years of expertise

$277 USD in 7 days
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3.6
Developer000

i will help with code and documentation ........................................................................................................

$30 USD in 3 days
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0.0
sujitdas487

I have 6 years experience in designing circuits of Fpga..where in various projects I used input output ports(pmod) interface with peripheral..specially I have already done projects on digital clock, time date etc in fp More

$144 USD in 7 days
(0 Reviews)
0.0
fermatliu

Can i finish it in Verilog Not VHDL. I am familiar with FPGA。for 5 year. Work for SoC Designer

$222 USD in 15 days
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0.0