DAC37J84 JESD204B Module

$750-1500 CAD

Completed

Posted

almost 8 years ago

$750-1500 CAD

Paid on delivery

I have a Cyclone V SoC kit (the development board). And TIs DAC37J82 digital to analog converter. The SPI interface is complete but I would like a module that takes in samples to output to the DAC and outputs the serdes data according the JESD204B specifications. SoCKit: [login to view URL] DAC37J82: [login to view URL] If you have any experience dealing with the Altera high speed transceivers or, more specifically, using an Altera FPGA to communicate with an ADC/DAC via the JESD204B protocol, please let me know.

Verilog / VHDL

Project ID: 11122478

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2 proposals

Remote project

Active 8 yrs ago

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Awarded to:

@rohi1710rohi1710

Hi , I am working as FPGA design engineer since last 7 years and I have expertise in both verilog and VHDL. I can help you in this project with greater accuracy.

$1,400 CAD in 15 days

4.9

(4 reviews)

3.8

2 freelancers are bidding on average $1,672 CAD for this job

@ahmedmohamed85

Dear sir I can do the interface using Mega functions please message me so that we can discuss it

$1,944 CAD in 15 days

5.0

(239 reviews)

7.4

@techsolve3

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$1,250 CAD in 20 days