Pcie jobs
I need someone who can make my 1900X and 2xrx580 into a Proxmox system with 2 dedicated gpus for gaming . CPU: TR1900X MB:x399 sli plus
To design a PCB schematic and layout for a raspberry Pi HAT shield with Mini PCIe interface and IoT wireless module that has mini PCIe interface as well. The HAT is to work with other mini PCIe wireless modules. Experience with EAGLE and Altium software, Raspberry pi, USB/RF impedance control. Experience with wireless chipsets.
...UDP ports opened except for DHCP g) Internal bridge enables all nodes to receive inbound connections from the internet. h) All nodes registered in dyn dns, Route 53 preferably, as subdomains – dev, test, prd, cicd i) All nodes have TLS certs installed for HTTPS j) All nodes have UFW to configure internal firewalls 2. Server install 2.1. 4 VMs on one server a) 64 Gb RAM, 8 Core Processor, 1Tb PCIE 4.0 SSD b) Centos 64 bit Hypervisor c) All VMs are externally visible on the network, so a bridge/switch is needed in the host OS d) All VMs will request through DHCP their own external IPs 2.2. PRD VM a) 32 GB Ram b) 4 Cores c) 256 Gb drive d) Depending upon the performance we can increase the Prd server capacity e) Syslog streamed out to cicd f) IPTables configured to permit...
utilizing TSB PCIe cam card readers, and FFMPEG we would like to record encrypted satellite TV stations for verification and monitoring purposes. we require that we record all channels per frequency available on our subscription services
I will give you all the components that what I want you to use except Capacitors and Resistors. I will give you CPU DISK RAM other components brand name. Than I want a design for MT7620A CPU 256MB RAM 32MB DISK PCIE Socket SATA SOCKET (I have schematic) Power Unit GPIO Pins SOCKETS for POWER GPIO Relay Resistors between GPIO pins and Socket. I want all design files and BOM List also. I want that design in altium.
...Management o Secure Firmware Update o Configuration File selection o Switch Temperature Monitoring - BMC Firmware Update - ARP Protocol & DHCP Protocol support on BMC NIC - Lightweight Directory Access Protocol (LDAP) support - Email / SNMP Alerting - Embedded Web server Basic Qualifications: - Strong knowledge of server hardware interfaces and Industry specifications such as SMBus/I2C, PCIe, ACPI, DDR, IPMI, 10G/1G Ethernet, NVMe, SPI, I2C - Strong knowledge with Linux Package Management (i.e. Yocto) - Previous BMC Firmware development mandatory (Dell iDRAC, Dell CMC, HPiLo, etc) - Linux driver development experience (JTAG, I2C, SPI) - C/C++ programming experience mandatory (make, makefiles, GNU...
...via wired Ethernet to the local network. I wish to connect directly between the PCIe x1 port of Computer 1 to the PCIe x1 port of Computer 2 for network communications between them. The wired Ethernet port and the PCIe communications need to be bridged so that Computer 1 also acts as a switch, to enable Computer 2 to connect to the local network through Computer 1. The functionality can be easily achieved if I connect PCIe to Ethernet cards to each computer and then use a wired Ethernet cable between them. But the solution I am looking for is one that avoids adding cards that involve convertors. It is my understanding that I do not need to add a card of any type (whether Ethernet, Firewire, PCIe etc) but I do need drivers to manage the sol...
Hardware based CS:GO cheat including aimbot, radar. I'm thinking DMA via PCIe and maybe arduino for mouse emulation. Radar should be network based meaning it can be viewed by anyone on the same network on any device. It should bypass FACEIT client anticheat and ESEA. The price can still be negotiated if you are up for the project. If you have any other questions regarding this please don't hesitate to message me. Thanks
I need assistance in converting portions of an existing schematic (see attached PDF) of a carrier board provided by the manufacturer of the SoC into a KiCAD Eeschema schematic. The portions I will need for this carrier board include the Ethernet connectors, CAN bus connectors, power supply, voltage protection, and mini-PCIe connector. I am in the process of transcribing the schematic, so whenever you may jump on your review of my existing work will be assigned. From there I will need assistance in part selection, PCB board layout, and routing. The supplier has a BoM for their board and many of the ICs are prescribed, however, I may desire some substitution depending if I chose to hand solder the eventual board or pay someone like PCB way for assembly. It is for this reason I des...
We have a PCIE interface card that runs a camera (frame grabber). We have problem writing a script to grab the frames. We just need that in any language. Just catch the bit stream
I need a developer to create a software to capture video AND snapshots independently from multiple (4) video sources (HDMI input) using pcie capture cards from producers like Magewell, Avermedia or others. It shall be possible to independently or simultanously stop and start recording for 1 or more video sources as well as same time creating snapshots. It must be possible to control the functionality using external input devices like the usb button bars from xkey dot com as well as using controls in the application. The developer MUST have extensive experience developing video capture software using capture cards. Do NOT apply if you do not have EXTENSIVE experience with that. Add sentence "Video Capture Application" at the first. The software shall operate on Windows 10 a...
We are seeking 1 FPGA Design Engineer for our new product development. FPGA Design Engineer Responsibilities: • Completing implementation in RTL • Ensuring robust and complete timing constraints • Optimizing FPGA...FPGA design platforms • Helping with migrating FPGA designs to ASICs. FPGA Design Engineer Qualifications • Strong RTL Development using Verilog, System Verilog, VHDL • Familiarity with Xilinx & Intel FPGA tools (Quartus Prime Pro) for FPGA Design and implementation. • Familiar with Structured ASIC • Experience with FPGA timing constraints, timing analysis, clock domain crossing • Understanding of PCIe specifications • Experience with C programming language in embedded systems is a plus • BS or MS in Electrical E...
Improve current stream capturing software Utilising a TBS PCIe TV tuner card we stream a frequency from the Lyngsat satellite to a localhost port as a TS stream. Leveraging FFMpeg and python we capture the stream and record it to 1-hour long segments. A second program then takes the TS file and once again utilizing FFmpeg we transcode the file into a mp4 passing the video portion of the stream to a GPU and the audio portion of the stream to the CPU Current programs are written in python running on a linux ubuntu 18.04 server We have a test machine we can grant access to for testing purposes. We need to have access to the recordings in the least amount of time as possible using the least amount of resources. Preferably within 5 min of the end of recording. Recordings ...
Need someone who has the PLDa PCIe ipcore license for Xilinx Vivado to help compile a FPGA project. I'll give you the source code. You compile and give me the bit file and compiled project.
The test program used for transmited data between DDR4 of FPGA and DDR4 of PC adopted windows 10 or win7 system via PCIe 3.0 x8. A tested result shows that the speed of PCIE3.0 *8 is over 7GB/s , which is tested by xilinx Kcu1500 FPGA board. However, the speed under win7 / win10 is only about 4.5-4.9GB/s. The minimum speed threshold should be 5.5 GB/s. And it will be helpful if the speed is more that 6 GB/s. Demands: 1) windows 10 or 7 system. 2) the speed is not less than 5.5 GB/s, normally over 6GB/s. 3) A test program need to be order to verify the speed. 4) the source code of PCIE3.0 and its project need to be provided. 5) Detailed comments are necessary in source code, which is helpful to understand the driver program.
I need transmit data from DDR of Xilinx Kintex-7 to PC (windows 10 system). I would like to use PCIe 3.0 x8 to realize the project, But I found that the speed is not enough if I use the drive source code ordered by xilinx, which is only about 4.5-4.9GB/s. The minimum speed threshold should be 5GB/s. And I expect the speed is more that 6GB/s. Demands: 1) windows 10 system. 2) the speed is not less than 5GB/s, normally over 6GB/s. 3) test program need to be order to test. 4) the source code of PCIE3.0 need to be provided, and project is also be provided. 5) Source code needs more detailed comments to understand the driver program.
i need someone teach me how to send and receive data from PCIe using c# step by step in in 2 weeks max.
We are looking to create a PCI-e expansion board based on a PEX8796 chip. The desired function is to connect 5 PCI-e x16 gen 3.0 devices on the board, the lanes are routed to the chip and allows for communication with 1 PCI-e slot to a main motherboard. (similar to the board in attachment). An NDA is to be signed to provide the needed confidential information about the Broadcom chips. Experience with PCI-e standards are a bonus. We'd also like to get information on where to source the boards & components + population and soldering. The project is finished when the first board is functional (ie. can connect 5 PCI-e GPGPU's which can communicate correctly with the main board and each other and can get enough power from the PCI-e slot). After this project we are developing 2 ...
...quick prototype of an Artix-7 fpga that makes a pcie to sd card controller (SD host controller/SD bus). Objective is to have a fpga card (working on pcie screamer) recognized as a SD/MMC card reader under windows, I need Windows to recognize/be able to install the windows built-in sd card drivers for the card. I don’t need it to actually read sd cards, I just need to simulate the presence of the device on Windows 10. Note : i chose SD card because it seems to be the simplest after research, but it can be any type of device that windows got build-in drivers for : vga graphic card, Ethernet controller, usb controller, audio card, nvme controller, anything. Yet again I don’t need the card to actually works for that usage, just the fact I plug the pcie ca...
Hi Krishna G., I noticed your profile and would like to offer you my project. We can discuss any details over chat. I am interested in a cryptocurrency miner for the XILINX VCU1525. Are you able to program a bitstream for it? I can send you a sample mining program that talks to the VCU 1525 over pcie.
I am looking for someone who can design a FPGA based X13bcd miner to mine X13bcd based coins like BCD. The design should be adaptable for possible changes in the X13bcd algorithm. Use vivado or other software make bitstream for vu9p fpga card with pcie,like xilinx vcu1525. make a miner software for ubuntu or windows. FPGA should be capable of mining with reasonable performance Developer should commit to Non disclosure agreement, and is not allowed to share the code with 3rd parties without written confirmation from the project investor. Developer then send the end solution, including code base, compiled code, written documentation about how to upload the code to ( by developer specified) FPGA and how to use it, including clear written instructions how to change parameters like usern...
I am looking for someone who can design a FPGA based X13bcd miner to mine X13bcd based coins like BCD. The design should be adaptable for possible changes in the X13bcd algorithm. Use vivado or other software make bitstream for vu9p fpga card with pcie,like xilinx vcu1525. make a miner software for ubuntu or windows. FPGA should be capable of mining with reasonable performance Developer should commit to Non disclosure agreement, and is not allowed to share the code with 3rd parties without written confirmation from the project investor. Developer then send the end solution, including code base, compiled code, written documentation about how to upload the code to ( by developer specified) FPGA and how to use it, including clear written instructions how to change parameters like usern...
We require a PCB designer familiar with gerber files and PCI Express FPGA designs. We have a reference design and we require the design simplifying so the board only provides the functions required to run our software as effective as possible.
I am looking for someone who can design a FPGA based x16r miner to mine Cuckoo Cycle based coins like rvn. The design should be adaptable for possible changes in the x16r algorithm. Use vivado or other software make bitstream for vu9p fpga card with pcie,like xilinx vcu1525. make a miner software for ubuntu or windows. FPGA should be capable of mining with reasonable performance Developer should commit to Non disclosure agreement, and is not allowed to share the code with 3rd parties without written confirmation from the project investor. Developer then send the end solution, including code base, compiled code, written documentation about how to upload the code to ( by developer specified) FPGA and how to use it, including clear written instructions how to change parameters ...
CPU capable of running Linux 64 bit- optionally can be with RISCV open source instruction set. make CPU as powerful and fast as possible. -GPU portion for graphics requirements in linux- as powerful and good as possible. ://content.ris...org/wp-content/uploads/2017/05/riscv-spec-v2.2.pdf&ved=2ahUKEwjlm__z55jfAhXOx1kKHTM8AbgQFjAAegQIBhAB&usg=AOvVaw3GMreXNki5Yuy0GlikEg51 Maybe it is possible to use these instruction sets? Also for bios , there are open source options for Linux such as LIBREBOOT https://libreboot.org. Basically my only requirements are that it can run LINUX 64 bit, and also work correctly with our HDMI port, USB ports, and PCIE SSD, RAM, wifi etc... Also it needs to be capable of rendering graphics as best as possible.
I am looking for someone who can design a FPGA based X13bcd miner to mine X13bcd based coins like BCD. The design should be adaptable for possible changes in the X13bcd algorithm. Use vivado or other software make bitstream for vu9p fpga card with pcie,like xilinx vcu1525. make a miner software for ubuntu or windows. FPGA should be capable of mining with reasonable performance Developer should commit to Non disclosure agreement, and is not allowed to share the code with 3rd parties without written confirmation from the project investor. Developer then send the end solution, including code base, compiled code, written documentation about how to upload the code to ( by developer specified) FPGA and how to use it, including clear written instructions how to change parameters like u...
Reference Item Links 1. 2. ASIN# B01IEU7UZ0 #1 keyword: usb wlan stick Rest 4 keywords: wlan stick für pc wlan adapter pc (one page seo can write as wlan adapter für pc) wlan empfänger für pc wlan stick 5ghz ASIN# B07DM1FWKB #1 keyword: pcie wlan karte Rest 4 keywords: wlan karte pc (one page seo can write as wlan karte für pc) wlan adapter pc (one page seo can write as wlan adapter für pc) pci express wlan karte dual band wlan karte Requirements. First, Translation, refers to the two links of items in our , including title, 5 bullet points, EBC, translate them from English to German, make sure it is readable and with German local language. Second, SEO Optimization, Above we have supplied 5 keywords for
PCIE USB 3.1 and 10 GB Ethernet card with trigger, Galvanic Isolation and drivers. 3D cad drawing a electrical simulations as part of delivery.
...resulting document should also include acceptance checklists for schematics and the PCB design. The resulting document will be used as a description of another project for a freelancer to design the board and prepare it for production. The product itself will be a PCIe x4 board with dual NIC controller Intel i350. The two SGMII interfaces of the i350 controller should be linked to two 400pin connectors. The 400pin connectors will be used to attach NVidia Jetson TX2 modules to the board. The Jetson TX2 modules will draw power from PCIe connector. The goal of the project is to connect two NVidia Jetson TX2 modules to a x86 host. The host PC will recognize this board as a NIC card with two interfaces. The Jetson TX2 modules' ethernet ports will be 'hardwired'...
I am looking for a skilled electronic engineer capable to design and prepare for production a PCIe x4 board with dual NIC controller Intel i350. The two SerDes interfaces of the i350 controller should be linked to two 400pin connectors. The 400pin connectors will be used to attach NVidia Jetson TX2 modules to the board. The Jetson TX2 modules will draw power from PCIe connector. The goal of the project is to connect two NVidia Jetson TX2 modules to a x86 host. The host PC will recognize this board as a NIC card with two interfaces. The Jetson TX2 modules' ethernet ports will be 'hardwired' to the i350 NIC. Thus, the Jetson TX2 modules would be accessible to the host PC via LAN connecton. Succesful bidder should have the datasheets to the components mention...
I need someone to modify the ccminer software. So it can communicate with FPGAs instead GPUs. It needs to work with both usb and pcie. I'm not asking for algorithm programming, I'm not asking for bitstreams. Just modifying the mining app ccminer so it works with FPGAs.
Need a person knowing about how PCIe communication works and build a driver for a PCIe device.
...Architecture and Operating Systems • Networking technologies in routing, switching, quality of service, the OSI model, and emerging MANET technologies • Knowledge of protocols such as RIP, OSPF, IP, Ethernet, and wireless communications • Open source networking technologies (network stack, open flow, etc) • Open source Linux development • Low-level drivers and hardware interfaces such as PCIe • Software defined systems, especially software-defined radios (e.g. GNU Radio) • DevOps technologies such as virtualization, Docker, scripting, git, testing and automation • Network Modeling and Simulation Tools: NS3 • Scripting Languages such as Python • Familiar with 802.11s standard and in-depth understanding on MAC pr...
...Computing Architecture and Operating Systems • Networking technologies in routing, switching, quality of service, the OSI model, and emerging MANET technologies • Knowledge of protocols such as RIP, OSPF, IP, Ethernet, and wireless communications • Open source networking technologies (network stack, open flow, etc) • Open source Linux development • Low-level drivers and hardware interfaces such as PCIe • Software defined systems, especially software-defined radios (e.g. GNU Radio) • DevOps technologies such as virtualization, Docker, scripting, git, testing and automation • Network Modeling and Simulation Tools: NS3 • Scripting Languages such as Python • Familiar with 802.11s standard and in-depth understanding on MAC pr...
• BIOS, UEFI Firmware and driver development • High speed peripherals e.g., NIC, PCIe, SATA, USB • Working knowledge and experience with PCIe driver development. • Strong knowledge in OS concepts and hands on ASM, C programming. • Experience with low speed interfaces SPI, I2C, UART, etc • Experience using ICE, Logic analyzer, Scopes, JTGA, TRACE tools for debugging hardware issues • Experience using low level kernel debuggers Strong knowledge on Linux OS Internals, Linux Driver • Experience with platform Software and firmware, BIOS, UEFI, Drivers • Familiarity with Linux operating systems would be preferred • Familiarity with Intel architecture, emulators JTAG/FTDI debuggers.
• BIOS, UEFI Firmware and driver development • High speed peripherals e.g., NIC, PCIe, SATA, USB • Working knowledge and experience with PCIe driver development. • Strong knowledge in OS concepts and hands on ASM, C programming. • Experience with low speed interfaces SPI, I2C, UART, etc • Experience using ICE, Logic analyzer, Scopes, JTGA, TRACE tools for debugging hardware issues • Experience using low level kernel debuggers Strong knowledge on Linux OS Internals, Linux Driver • Experience with platform Software and firmware, BIOS, UEFI, Drivers • Familiarity with Linux operating systems would be preferred • Familiarity with Intel architecture, emulators JTAG/FTDI debuggers.
Project Description: Hi, i'm looking for a freelancer having experience with Astra Cesbo, ffmpeg, DVB-C PCIe cards for an IPTV Project. 1. Install of Astra and config 2. Transcode DVB-C stream into h264 using ffmpeg. Target: 1 Mbps stream udp 3. Clear documentation Please contact me for questions Thanks
...built as a solid 3D plastic part. The test fixture will contain a small PCB with a PCIe connector. The test fixture will have a opening on one end with a card guide which will allow one of our cards to be slid into the test fixture and connect to the text fixture's small PCB using the PCIe connector. When in place, the card can be tested. The top and bottom of the test fixture will be open so our engineers can access the top and bottom of the card being tested. Total size of test fixture will be about 4.0 inches X 7.0 inches X 1.5 inches. I am uploading the details of our card to be tested and the PCIe connector. Here is the link to the PCIe connector in 3D format: The card will slide into the test fixture using card guides
I am looking for FPGA designer (Altera) with experience in DMA over PCIe.
I have developed a LabVIEW code that uses a producer-consumer loop using the National instrument PCIe-6612 card. In the producer loop, the counter counts the incoming TTL pulses ( for a specific time window in ms) based on the sampling frequency, and does so continuously till the total number of repetition are reached. At the same time it sends the counts to the consumer loop, where it is processed and a real time correlation curve is generated. It then save the processed data and the raw counts. Now what I want is to count and process in batches instead of continuously. The program should run continuously until the total number of repetition are reached but should count, process and save data for few repetition, pause and then repeat, until the end. Also at each pause it should ...
We required a Consultant who can support us in building an Intel Processor-based Embedded Systems. Mandatory: • 2+ Years of C, C++ development experience in Intel Processor based Embedded Systems • Experience with developing/debugging device drivers (PCIe, Ethernet, USB) • Experience with developing Memory Device Drivers and File systems (NAND, NOR, eMMC, DDR etc.) • Hands-on experience in using debugging tools like GDB, JTAG etc. • Experience working in UEFI/ BIOS programming Desired: • Experience in VxWorks • Experience on board bring up on different Architectures. • Experience on debugging various Kernel Development issues like Kernel panic, Kernel crashes, Memory leaks, etc. • Experience in OpenGL Kalpana Bhatia Logic Fruit Te...
We need configuration of TVheadend on ubuntu What we have tvheadend installed and working on ubuntu, we have tuned and streems of FTA channels using TBS 6909 DVBS/S2 PCIe card What we want We want some one help us descramble chanels
You will be part of our Quality Assurance (QA) Team and your mai...management tools 5. be able to work proactively as an individual contributor as well as remote team member YOU ALSO NEED TO HAVE THE FOLLOWING SYSTEM REQUIREMENT FOR WORK: 1. At least [fifth generation] Corei3/Corei5 2.5+ Ghz up 2. At least [fifth generation] Corei3/Corei5 2.5+ Ghz up 3. Memory – 8GB [least is 4 GB] 1TB max 4. Video – dedicated video card with at least 2 GB GPU memory [PCIe – AMD or Nvidia ] 5. Hard Drive – Any 7200 RPM 500 GB or more [recommended: SSD 256 or higher, ie nforce, intel, samsung] 6. Should have a mic for recording videos on reported issues 7. Should have a working webcam to test webcam shot feature and for meeting purposes 8. Should have backup for ...
The report will need to include: 1. History (first use in supercomputers and hyperscale cloud) 2. Brief architecture and performance trends description (first introduction -> Today) and Graph 3. GPUs as a standalone (PCIe) accelerator 4. GPUs integration in SoC/CPUs (integrated accelerator)
...hire me see below lines for my knowledge . If you want you can take me interview • Excellent experience in placement and routing of Analog, Digital, RF and mixed signal design. • Experienced in design of high density multilayer PCBs (up to 16layers) with impedance Matching in strip and micro strip lines. • Experienced in routing of DDR2, FPGA, DDR3, DDR4, QDR4, USB, Ethernet, Audio CODEC, and QSFP, PCIe, BPI Fash, HDMI interfaces. • Experienced in placement and routing of multi layer RF boards and micro strip method. • Experienced in Flex boards. • Hands on experience in creating Foot prints as per IPC Standards. • Hands on experience in schematic drawing in Orcad Design Capture and Concept HDL • Knowledge in DFM, DFA and DFT analysis &bul...
...hire me see below lines for my knowledge . If you want you can take me interview • Excellent experience in placement and routing of Analog, Digital, RF and mixed signal design. • Experienced in design of high density multilayer PCBs (up to 16layers) with impedance Matching in strip and micro strip lines. • Experienced in routing of DDR2, FPGA, DDR3, DDR4, QDR4, USB, Ethernet, Audio CODEC, and QSFP, PCIe, BPI Fash, HDMI interfaces. • Experienced in placement and routing of multi layer RF boards and micro strip method. • Experienced in Flex boards. • Hands on experience in creating Foot prints as per IPC Standards. • Hands on experience in schematic drawing in Orcad Design Capture and Concept HDL • Knowledge in DFM, DFA and DFT analysis &bul...
troubleshooting TVheadend with Avermedia PCIe Card. DVB-S please only bid if you really know TVHeadend
